Fet comparator circuitry

Details Fet comparator circuitry Fet comparator circuitry

H - Electricity

03

K

328/175

H03K 5/22 (2006.01) H03F 1/30 (2006.01) H03K 5/24 (2006.01)

Patent

CA 2019034

A comparator circuit for operation at video rate signals includes input switches to alternately couple a reference and a signal potential to a summing capacitor. The capacitor is coupled to the input of a first inverting amplifier. The amplifier includes a switch between input and output terminals for selectively autozeroing the amplifier. The amplifier is direct coupled to the input of a second inverting amplifier having an autozero circuit exclusive of a connection to the input of the second amplifier. Timing circuitry for controlling the autozero function is arranged to minimize the effects of clocking transients upsetting the autozeroed potentials thereby reducing the response time and enhancing the sensitivity of the comparator.

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