Field-effect semiconductor device including superlattice...

H - Electricity – 01 – L

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H01L 29/78 (2006.01) H01L 21/336 (2006.01) H01L 29/08 (2006.01) H01L 29/10 (2006.01) H01L 29/15 (2006.01)

Patent

CA 2623555

A semiconductor device (20) may include a substrate (21) and spaced apart source (13) and drain (27) regions defining a channel region (24) therebetween in the substrate. The substrate may have a plurality of spaced apart superlattices (25) in the channel and/or drain regions. Each superlattice may include a plurality of stacked groups of layers, with each group including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer thereon. The at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent base semiconductor portions. The semiconductor device may be a DMOS device.

L'invention concerne un dispositif à semi-conducteurs pouvant comprendre un substrat et des zones de source et de drain espacées définissant une région de canal intermédiaire dans le substrat. Le substrat peut comprendre une pluralité de super-réseaux espacés dans les régions de canal et/ou de drain. Chaque super-réseau peut comprendre une pluralité de groupes empilés de couches, chaque groupe comprenant une pluralité de monocouches de semi-conducteur de base empilées définissant une partie de semi-conducteur de base et au moins une monocouche de matériau non semi-conducteur disposée sur celle-ci. La ou les monocouches de matériau non semi-conducteur peuvent être confinées dans un réseau cristallin de parties de semi-conducteur de base adjacentes.

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