Field effect transistor

H - Electricity – 01 – L

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356/149

H01L 29/78 (2006.01) H01L 21/28 (2006.01) H01L 21/306 (2006.01) H01L 21/336 (2006.01) H01L 29/205 (2006.01) H01L 29/36 (2006.01) H01L 29/778 (2006.01)

Patent

CA 1252914

-8- FIELD EFFECT TRANSISTOR Abstract An InP MISFET (10) includes the following layers grown by chloride VPE on a semi-insulating surface of an InP body (12): an unintentionally doped n-- InP channel layer (14), an unintentionally doped n--InGaAs diffusion barrier layer (16), and an n-InGaAs contact-facilitating layer (18). An opening is formed in the InGaAs layers to expose a portion of the channel layer (14) where the gate electrode means 30 is to be formed by depositing a dielectric layer (20) and a metal gate electrode (22). Source (40) and drain (50) contacts are formed on the n-InGaAs layer (18) on opposite sides of the opening.

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