H - Electricity – 01 – L
Patent
H - Electricity
01
L
H01L 29/812 (2006.01)
Patent
CA 2059232
Abstract of the Disclosure The invention provides a FET by forming a channel layer in layer including "n" type impurity at high concentration, which is sandwitched by a first semiconductor layer and a second semiconductor layer lightly doped with impurity. Therefore even when electrons in the channel layer obtain high energy, the electrons in this arrangement rush out essentially to the second semiconductor layer excelling in electron carrying characteristic, thus a travelling speed of the electrons in the channel layer is not lowered. Furthermore the channel layer being formed in layer and allowed to include impurity at high concentration, the current drive capability can be improved.
Marks & Clerk
Sumitomo Electric Industries Ltd.
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