Field effect transistor and method of forming a mask pattern...

Details Field effect transistor and method of forming a mask pattern... Field effect transistor and method of forming a mask pattern...

H - Electricity

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H01L 21/31 (2006.01) H01L 21/027 (2006.01) H01L 21/28 (2006.01) H01L 21/285 (2006.01) H01L 21/308 (2006.01) H01L 21/3105 (2006.01) H01L 21/338 (2006.01) H01L 29/80 (2006.01) H01L 29/812 (2006.01)

Patent

CA 1307054

Abstract In a compound semiconductor device source and drain regions are formed on both sides of a groove defined in a substrate, both regions being separated from the side walls of the groove by predetermined intervals by a first region with a depth shallower than the groove. A second region is formed between the source and drain region with a depth deeper than the groove. A gate electrode is formed on the surface of the second region in the groove for Schottky contact with the upper surface of the second region. The result is a GaAs-MESFET with a good high frequency characteristic that can be manufactured with high reliability.

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