Flat package for integrated circuit memory chips

Details Flat package for integrated circuit memory chips Flat package for integrated circuit memory chips

H - Electricity

01

L

356/61, 352/82

H01L 23/28 (2006.01) H01L 23/498 (2006.01)

Patent

CA 1232082

ABSTRACT Flat package is designed for receiving integrated circuit memory chips with connections on the ends and bringing the circuitry around for edge connection onto printed circuit board sized to receive a 16-lead flat pack. The package (10) has a cavity (22) for receipt of an integrated circuit memory chip (24) with interior pads (46, 68) for wire bond connec- tion to the ends of the IC memory chip. Conductive metal traces (60, 62) bring the circuits around to exterior pads ( 52, 54 ). Leads are connected from the exterior pads to the contact points on the printed circuit board. The flat package (10) is sized to fit within a standard 16-lead cell on a printed circuit board.

470731

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