Floating point processor having concurrent exponent/mantissa...

Details Floating point processor having concurrent exponent/mantissa... Floating point processor having concurrent exponent/mantissa...

G - Physics

06

F

354/230.71

G06F 7/48 (2006.01) G06F 5/01 (2006.01) G06F 9/30 (2006.01) G06F 9/302 (2006.01)

Patent

CA 1123110

ABSTRACT OF THE DISCLOSURE A Floating Point Processor or Floating Point Unit (FPU) with capability for performing exponent/sign-related calculations concurrently with mantissa-related calculations. The operation of the FPU within the context of a general purpose digital computer system is shown. The FPU has control, mantissa, and exponent/sign functional blocks which have unique architectural arrangements and interconnections therebetween, and also have interfacing structure for connecting system control and clock signals to the control block. The operation of the FPU is timed in a particular manner to permit is operation to be transparent to, or to not impact operation of the CPU, when the FPU communi- cates with main memory or the CPU.

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