Formation of submicron features in semiconductor devices

Details Formation of submicron features in semiconductor devices Formation of submicron features in semiconductor devices

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H01L 21/31 (2006.01) H01L 21/033 (2006.01) H01L 21/28 (2006.01) H01L 21/311 (2006.01) H01L 21/316 (2006.01) H01L 21/3213 (2006.01) H01L 21/336 (2006.01)

Patent

CA 1201216

ABSTRACT FORMATION OF SUBMICRON FEATURES IN SEMICONDUCTOR DEVICES This invention involves the defining of a submicron feature 93 in a structure, typically an insulated gate field effect transistor structure. This feature is defined by a sidewall oxide layer 71 formed by reactive oxygen ion etching of the structure being built at a time when an exposed layer 64 in the vicinity of the sidewall contains atoms of a material, for example, silicon or aluminium, which combine with the oxygen ions to form the sidewall oxide layer. The sidewall oxide layer may be used as a mask to form a feature 93 or it may itself constitute such a feature, for example a protective layer on the sidewalls of a polysilicon gate of a F.E.T.

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