Forming interconnects

H - Electricity – 01 – L

Patent

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Details

H01L 51/40 (2006.01) H01L 21/311 (2006.01) H01L 21/768 (2006.01) H01L 51/52 (2006.01) H01L 27/32 (2006.01)

Patent

CA 2394895

A method for forming an electronic device, comprising: forming a first conductive or semiconductive layer; forming a sequence of at least one insulating layer and at least one semiconducting layer over the first conductive or semiconductive layer; locally depositing solvents at a localised region of the insulating layer so as to dissolve the sequence of insulating and semiconducting layers in the region to leave a void extending through the sequence of layers; and depositing conductive or semiconductive material in the void.

L'invention concerne un procédé permettant de former un dispositif électronique. Ce procédé consiste: à former une première couche conductrice ou semi-conductrice; à former une séquence d'au moins une couche isolante et d'au moins une couche semi-conductrice sur la première couche conductrice ou semi-conductrice; à déposer localement des solvants au niveau d'une région localisée de la couche isolante de manière à dissoudre la séquence des couches isolantes et semi-conductrices dans la région afin de laisser un vide s'étendant à travers la séquence de couches; et à déposer un matériau conducteur ou semi-conducteur dans le vide.

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