Forming thick dielectric at the bottoms of trenches utilized...

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356/138

H01L 21/316 (2006.01) H01L 21/306 (2006.01) H01L 21/762 (2006.01) H01L 29/94 (2006.01)

Patent

CA 1250962

FORMING THICK DIELECTRIC AT THE BOTTOMS OF TRENCHES UTILIZED IN INTEGRATED-CIRCUIT DEVICES Abstract Selective wet or plasma anodization is utilized for forming a relatively thick dielectric layer only at the bottoms of trenches included in DRAM and/or CMOS devices. In that way, the electrical characteristics of trenches that include bottoms having surface roughness and/or sharp or irregular corners are significantly improved. Additionally, electrically isolated capacitor structures in elongated trenches formed in DRAM devices are thereby made feasible.

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