H - Electricity – 04 – L
Patent
H - Electricity
04
L
H04L 1/22 (2006.01) H04B 10/18 (2006.01) H04J 3/14 (2006.01) H04J 3/16 (2006.01) H04L 1/00 (2006.01) H04Q 11/04 (2006.01)
Patent
CA 2278820
Memory requirements and processing delays associated with the application of forward error correction in high speed optical transmissions are substantially reduced by mapping a forward error correction code on a row-by-row basis into unused overhead bytes in a high bit rate signal frame. By applying the forward error correction code to an entire row of the signal frame on a row by row basis, approximately one row needs to be stored at a time thereby reducing the total memory requirements for forward error correction processing. Using SONET as an exemplary application, approximately 1/9th of the entire SONET frame (e.g., one of nine rows) needs to be buffered for forward error correction processing. In an illustrative embodiment, four forward error correction (FEC) blocks are provided for each row for a total of 36 FEC blocks for a frame. Each FEC block comprises four bytes of correction bits for a total of 32 correction bits. These 32 correction bits are mapped to unused overhead and are used for correcting errors in one block of one row of a signal frame, wherein one block covers 1/4th of the row. Other unused overhead bytes in the row can be used to carry error detection codes for detecting multiple errors in a row to determine when forward error correction should be disabled. For example, if a single bit error correcting code is employed, then error correction can be disabled to avoid false corrections if more than one error is detected.
Bordogna Mark Aldo
Dohmen Ralf
Sturm Wolfram
Kirby Eades Gale Baker
Lucent Technologies Inc.
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