Fractional n/m synthesis

Details Fractional n/m synthesis Fractional n/m synthesis

H - Electricity

03

L

H03L 7/18 (2006.01) H03L 7/183 (2006.01) H03L 7/197 (2006.01) H03L 7/20 (2006.01)

Patent

CA 2048646

A frequency synthesizer employs a frequency divider (103) and a frequency multiplier (403) in the feedback loop. The minimum frequency separation between two adjacent synthesized channels is equal to the reference frequency divided by the multiplication ratio of the multiplier. The division ratio of the frequency divider (103), which can be analyzed as the sum of an integer and a fractional portion, is varied with time by a digital sequence, resulting in a minimum frequency increment equal to a fraction of the reference frequency. The multiplier (403) acts to reduce the nonlinearities of the frequency synthesizer when the fractional portion of the division ratio causes a large variation in the instantaneous division ratio by reducing the effective division ratio of the loop.

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