H - Electricity – 04 – J
Patent
H - Electricity
04
J
363/10
H04J 3/02 (2006.01) H04J 3/06 (2006.01)
Patent
CA 2036393
A frame aligner and a method and system for control thereof, in which the frame alignment is executed while assuring TSSI (Time Slot Sequence Integrity). In a system for transmitting a plurality of low-speed signals having a frame structure in a high-speed frame, a plurality of candidates for a write start phase for a frame aligner memory (1) are set, and by accessing a common phase memory (8) storing a write start phase shared by low-speed signals requiring phase matching therebetween of all the low-speed signals stored in the high-speed frame, a write start phase is selected from among the candidates for the write start phase for the frame aligner memory.
Ashi Yoshihiro
Kanno Tadayuki
Takatori Masahiro
Ueda Hiromi
Hitachi Ltd.
Kirby Eades Gale Baker
Nippon Telegraph And Telephone Corporation
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