Frame recovery circuit for receiver for pulse code...

Details Frame recovery circuit for receiver for pulse code... Frame recovery circuit for receiver for pulse code...

H - Electricity

04

J

363/13

H04J 3/06 (2006.01)

Patent

CA 1136781

A B S T R A C T A frame recovery circuit for a pulse code multiplexed signal receiver is provided. Simple and reliable decoding of T-1 type pulse code information is achieved by combining a fast-acting recirculating frame recovery circuit with a simplified signal output register. The frame re- covery circuit uses a recirculating 386-bit control word in which all positions which cannot be the main-frame bit position are continuously recorded by the continuous comparison of pairs of incoming data bits spaced 386 bits apart. Following a sufficient number of iterations of the control word to statistically identify all 385 non-main-frame-bit positions with a high degree of probability, the remaining unidentified position is read out as the main-frame bit position, and is used to reset the frame clock generator.

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