Frame synchronisation method

H - Electricity – 04 – L

Patent

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Details

H04L 7/027 (2006.01) H04J 3/06 (2006.01) H04L 7/04 (2006.01)

Patent

CA 2181736

A method for frame synchronisation including the detection of a n-bit pattern with predetermined characteristics in a bitstream is described. The subject method includes the steps of extracting a first set of m bits, with m being smaller than or equal to n, from a first position in said bitstream, deriving from said first set an address of a location in a first memory, deriving from the contents of said location in said first memory at least one second position in said bitstream and at least one second set of bits to be extracted therefrom until said n-bit pattern is detected in said bitstream. An apparatus for performing the subject method is additionally described.

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