Frame synchronizer having a write-inhibit circuit

H - Electricity – 04 – N

Patent

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352/18.3

H04N 5/04 (2006.01) H04N 5/073 (2006.01)

Patent

CA 1136762

ABSTRACT OF THE DISCLOSURE The invention relates to a frame synchronizer having a write-inhibit circuit. A frame synchronizer brings an incoming television signal into synchronism with a reference synchronizing signal by writing the incoming signal in a memory, while the read-out of the memory is carried out in re- sponse to the synchronizing signal. In a conventional frame synchronizer, the switch-over at its input from a first incoming television signal to a second television signal which is not synchronized with the first one causes at the output of the synchronizer a disturbance of the second signal by the first one. In the present invention, there is provided a frame synchronizer having a write-inhibit circuit which provides a write-inhibit control signal for inhibiting the write-in of the second input television signal from the moment of switch-over to the beginning of a complete frame of the second in- put signal thereof. The improved frame synchronizer in accordance with the invention prevents the above-mentioned disturbance of television signals caused by the non-synchronous switching at its input.

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