Frame-synchronizing-signal capturing circuit of receiver

H - Electricity – 04 – L

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Details

H04L 27/22 (2006.01) H04J 3/06 (2006.01) H04L 7/04 (2006.01)

Patent

CA 2316177

A demodulator (1) produces I and Q symbol streams from a received PSK signal which is a time-multiplexed signal composed of a 20-symbol-long BPSK frame sync signal, a 20-symbol-long BPSK superframe identification signal, and an 8PSK digital signal. BPSK demappers (3) produce bit streams B0-B3 demapped according to a base criterion, which allows signal points to be the same along the Q-axis in the I-Q phase plane, and to criterions obtained by shifting the base criterion counterclockwise by .pi./4, 2.pi./4 and 3.pi./4. First comparators (60-63) capture, from the bit streams B0-B3, patterns being different few bits at most than the frame sync signal. A predetermined time later, second comparators (64-67) capture patterns being different few bits at most than the superframe identification signal. A frame sync capture signal (SYN) is then produced by a generator (90).

Un démodulateur (1) produit des trains de symboles I et Q à partir d'un signal modulé par déplacement de phase (MDP) qui est un signal à multiplexage temporel constitué d'un signal de synchronisation de trame à modulation par déplacement binaire de fréquence (MDBF) long de 20 symboles, d'un signal d'identification supertrame MDBF long de 20 symboles, et d'un signal numérique MDP8. Des extracteurs MDBF (3) produisent des trains binaires B0-B3 extraits d'après un critère de base, ce qui permet à des points de signal d'être identiques le long de l'axe Q dans le plan de phase I-Q, et d'après des critères obtenus par déplacement du critère de base dans le sens contraire à celui des aiguilles d'une montre, de pi /4, 2 pi /4 et 3 pi /4. A partir des trains binaires B0-B3, des premiers comparateurs (60-63) acquièrent des configurations qui diffèrent au plus de quelques bits par rapport au signal de synchronisation de trame. Au bout d'un temps prédéterminé, des seconds comparateurs (64-67) acquièrent des configurations qui diffèrent au plus de quelques bits par rapport au signal d'identification de supertrame. Un signal d'acquisition de synchronisation de trame (SYN) est ensuite fourni par un générateur (90).

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