Frequency division multiplexed analog to digital converter

H - Electricity – 04 – N

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350/56

H04N 5/44 (2006.01) H04N 9/64 (2006.01)

Patent

CA 1246206

Abstract of the Disclosure A digital television receiver, having a line locked clock, includes a first digital phase locked loop which regenerates quadrature phase related subcarrier signals that are used to synchronously demodulate the chrominance signal components of composite video signals into color information signals. When nonstandard video signals (e.g., from a video tape recorder) are processed by the receiver, frequency instabilities in the line locked clock signal may cause the color information signals to be distorted. To compensate for this distortion, a second phase locked loop is synchronized to a reference signal generated by an analog oscillator. The analog reference signal is linearly added to baseband analog video signals provided by a tuner. The combined signals are digitized by an analog-to-digital converter and then filtered by parallel low-pass and band-pass filters to develop digital signals representing the video signals and the reference signal, respectively. The digital reference signal is used to synchronize the second phase locked loop, the control signals of which are used to compensate the first phase locked loop for frequency instabilities in the clock signal.

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