Frequency scaler for synchronous digital clock

Details Frequency scaler for synchronous digital clock Frequency scaler for synchronous digital clock

H - Electricity

03

K

H03K 23/68 (2006.01) H03K 23/50 (2006.01) H03K 23/66 (2006.01)

Patent

CA 2076960

A frequency scaler comprising a plurality of flip- flops, varies its frequency division to correct phase by 0.5 clock cycle. Each flip-flop is continuously and synchronously responsive to either a rising or a falling edge of the clock pulses. Normally, the scaler's state transits along one of two loops, which generate output pulses having identical repetition rates. When a control signal is applied, the scaler's state transits from one loop to the other, generating at least one output at an alternative repetition rate. The alternative repetition rate is either lower or higher than the identical repetition rate by an integral number of half cycles of the input clock pulses. Where there are two control signals, a lower or higher alternative repetition rate can be selected. Since the flip-flops are responsive to either edge of the clock pulses without clock gating interruptions, there is no jitter and the scaler's robustness is improved. Also the clock frequency can be effectively halved. -i-

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