H - Electricity – 03 – L
Patent
H - Electricity
03
L
331/32
H03L 7/18 (2006.01) H03L 7/081 (2006.01) H03L 7/197 (2006.01)
Patent
CA 1175506
PHB 32690 21 ABSTRACT: In phase lock loop frequency synthesisers, it is known to use a successive addition rate multiplier as part of the variable frequency dividing means and to use the residue in the rate multiplier to provide a correction signal which is used to balance out ripple which appears in the frequency control signal fed to the variable fre- quency oscillator which provides the output frequency of the synthesiser, the ripple being caused by phase jitter in an input signal to the phase comparator. The invention improves the ripple elimination by means of a feedback loop in which any residual ripple is detected and the cor- rection signal is automatically adjusted accordingly to eliminate the ripple.
368596
Underhill Michael J.
Walters Nigel J.
Koninklijke Philips Electronics N.v.
Van Steinburg C.e.
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