Frequency synthesizer with rom controlled divider and display

G - Physics – 06 – F

Patent

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354/137

G06F 3/14 (2006.01)

Patent

CA 1108300

ABSTRACT A frequency synthesizer is disclosed in which a single read only memory (ROM) is utilized to directly control programmable frequency dividers in a phase locked loop while also directly controlling the excitation of seven segment visual digital display modules. During the tuning of the frequency synthesizer, an enable circuit disables the programmable dividers while altering the input signals to the read only memory such that direct drive signals are produced by the output of the read only memory which alternately excite two separate seven segment displays modules. After the tuning operation is completed, the enable circuit alters the input signals to the read only memory, simultaneously enables the programmable dividers, and effectively disables the digital display modules such that they hold their previous visual displays.

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