Fsk demodulator

H - Electricity – 03 – D

Patent

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329/16

H03D 3/00 (2006.01) H04L 27/156 (2006.01)

Patent

CA 1243083

ABSTRACT OF THE DISCLOSURE An FSK demodulator which does not require intricate adjustment and eliminates the limitation on usable frequencies is described. The demodulator includes a clock generator for generating clock pulses and a signal converter for converting an FSK signal having an analog level to a digital signal having a predetermined level. A first logic circuit gates the clock pulses in response to an output signal of the signal converter. A second logic circuit inverts an output signal of the signal converter. A third logic circuit, reset by an output signal of a fourth logic circuit, counts output signals of the first logic circuit. The fourth logic circuit is reset by an output signal of the second logic circuit, for counting the clock pulses. A fifth logic circuit receives an output signal of the third logic circuit at a first input terminal, the clock pulses at a second input terminal and an output signal of the fourth logic circuit at a third input terminal. The fifth logic circuit temporarily memorizes the output signal of the third logic circuit. A sixth logic circuit receives an output signal of the fourth logic circuit at a first input terminal and an output signal of the fifth logic circuit at a second input terminal, and provides a demodulation signal.

486949

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