Full-duplex communication processor

Details Full-duplex communication processor Full-duplex communication processor

H - Electricity

04

J

H04J 1/16 (2006.01) G06F 13/12 (2006.01) H04B 1/44 (2006.01) H04L 12/28 (2006.01) H04L 12/50 (2006.01) H04L 12/56 (2006.01) H04L 29/06 (2006.01) H04Q 11/00 (2006.01)

Patent

CA 2304340

A full duplex communication processor (20) simultaneously sends and receives frames of data and commands. Separate transmit (32) and receive (30) protocol engines are controlled by separate sequencers. This enables frames of data to be received and transmitted simultaneously without involving the CPU (40) on a frame-by-frame basis.

Un processeur de communication en duplex (20) envoie et reçoit simultanément des séquences de données et de commandes. Des moteurs de protocole d'émission (32) et de réception (30) séparés sont commandés par des séquenceurs séparés. Ainsi, les séquences de données peuvent être reçues et émises simultanément sans que l'UC (40) intervienne séquence par séquence.

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