Fully digital phase-locked loop

H - Electricity – 03 – L

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328/28, 331/35

H03L 7/091 (2006.01) H03L 7/097 (2006.01)

Patent

CA 1293032

PHF.86597 1 2 20-10-1987 ABSTRACT: Fully digital phase-locked loop. A fully digital phase-locked loop comprises a sampler (1), an analog-to-digital converter (2), two quadrature demodulators (3 and 4) and their associated filters (5 and 6), and a decision logic (7) effecting the correction of the sampling phase around the value of the free-running frequency (fe) by the addition or subtraction of machine cycles of a signal processor (9). [Fig. 1].

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