Galois field arithmetic logic unit

G - Physics – 11 – B

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354/182

G11B 20/18 (2006.01) G06F 7/72 (2006.01) H03M 13/15 (2006.01)

Patent

CA 1276043

ABSTRACT OF THE DISCLOSURE The present invention relates to a Galois field arithmetic logic unit of a code error check/ correct apparatus to be employed when recording/ reproducing data on an optical disk. The arithmetic logic unit uses a combination including a parallel multiplication circuitry of a primitive element .alpha. of a Galois field, an EX-OR addition circuitry for the multiplication results, a 0 element decision circuitry for the results of the addition, and resisters to which the multiplication results are fed back so as to accomplish a parallel computation of a polynomial, thereby enabling a root and an error value of an error location equation to be obtained at a high speed. The arithmetic logic unit develops a remarkable reduction of the amount of computation particularly when the code system has a great code length and the degree of the error location polynomial associated with the long distance code is as high as d = 17.

553939

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