Gate-coupled field-effect transistor pair amplifier

H - Electricity – 03 – F

Patent

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330/20, 328/202,

H03F 3/42 (2006.01) H03F 3/16 (2006.01) H03F 3/345 (2006.01) H03F 3/50 (2006.01)

Patent

CA 1205879

-8- Gate-Coupled Field-Effect Transistor Pair Amplifier Abstract An enhancement mode and a depletion mode pair of N-channel MOS transistors have their drain-source conduction paths connected in series and provided with a bias current means. The gates are coupled together as an input node. In one embodiment their bulk regions are source-connected and the output is from the source of the enhancement mode device to obtain a source follower configuration amplifier. In a second embodiment, the output is taken from the drain of the depletion mode device to obtain a common source configuration amplifier. Two source follower pairs are disclosed connected in parallel to form a differential input voltage amplifier stage. A common source pair is disclosed in combination with an additional enhancement mode transistor to form a current mirror.

442315

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