H - Electricity – 03 – K
Patent
H - Electricity
03
K
H03K 17/687 (2006.01) H03K 7/08 (2006.01)
Patent
CA 2759210
A DC-coupled two-stage gate driver circuit for driving a junction field effect transistor (JFET) is provided. The JFET can be a wide bandgap junction field effect transistor (JFET) such as a SiC JFET. The driver includes a first turn-on circuit, a second turn-on circuit and a pull-down circuit. The driver is configured to accept an input pulse-width modulation (PWM) control signal and generate an output driver signal for driving the gate of the JFET.
L'invention porte sur un circuit d'attaque de grille à deux étages à couplage en courant continu destiné à piloter un transistor à effet de champ à jonction (JFET). Le transistor JFET peut être un transistor à effet de champ à jonction à large bande interdite telle qu'un transistor JFET au SiC. Le circuit d'attaque comprend un premier circuit de déblocage, un second circuit de déblocage et un circuit d'excursion basse. Le circuit d'attaque est conçu pour accepter un signal de commande à modulation d'impulsions en durée (PWM) d'entrée et générer un signal d'attaque de sortie pour attaquer la grille du transistor JFET.
Kelley Robin Lynn
Rees Fenton
Macrae & Co.
Ss Sc Ip Llc
LandOfFree
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