Gold plating process

Details Gold plating process Gold plating process

H - Electricity

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L

204/29, 204/91.8

H01L 21/288 (2006.01) C25D 3/48 (2006.01) C25D 5/02 (2006.01) C25D 7/12 (2006.01)

Patent

CA 1202273

- 1 - Abstract: The invention provides a process for fabricating devices comprising at least one n-type or intrinsic III-V compound semiconductor material. The process comprises at least one step in which gold is plated on a metallic surface electrically connected to the III-V compound semiconductor by an oxidation-reduction reaction in an electrolytic solution. The oxidation is carried out by illuminating the III-V compound semiconductor with light with photon energy at least as great as the band gap of the compound semiconductor so as to create holes that permit oxidation of the semiconductor. The electrolytic solution comprises a source of gold which on reduction yields metallic gold, and the source of gold is reduced on the metallic surface to form metallic gold. This provides a reliable procedure for inducing plating at preselected areas on a compound semiconductor structure.

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