Grooved gate field effect transistor

Details Grooved gate field effect transistor Grooved gate field effect transistor

H - Electricity

01

L

356/128, 356/149

H01L 29/78 (2006.01) H01L 29/423 (2006.01)

Patent

CA 1218471

SPECIFICATION BE IT KNOWN, that I, JOHN CHARLES WHITE, Shires Lodge, Old Church Road, Colwall, Herefordshire, England, having made an invention entitled FIELD EFFECT TRANSISTORS, the following disclosure contains a correct and full description of the invention and of the best mode known to the inventor of taking advantage of the same: ABSTRACT OF THE DISCLOSURE A grooved gate field effect transistor wherein the length of the channel between the source and drain, the depth of the groove, and the dopant concentration in the substrate material of the transistor, are all such that upon the application of substrate bias the transistor exhibits a characteristic for which the threshold voltage decreases with increase in substrate bias. It is preferable that the walls of the groove are steep-sided and that the groove is of asymmetrical step structure, the drain diffusion lying lower than the source diffusion and level with the gate electrode. An inverter may be constructed using two transistors, as above, with a common contact between the source-or-drain electrodes of each.

438852

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