Ground level precharge bit line scheme for read operation in...

Details Ground level precharge bit line scheme for read operation in... Ground level precharge bit line scheme for read operation in...

G - Physics

11

C

G11C 11/16 (2006.01)

Patent

CA 2702487

Systems, circuits and methods for read operations in Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) are disclosed. A plurality of bit cells, each coupled to one of a plurality of bit lines, word lines and source lines are provided. A plurality of precharge transistors corresponding to one of the plurality of bit lines are configured to discharge the bit lines to ground prior to a read operation.

L'invention concerne des systèmes, des circuits et des procédés pour des opérations de lecture dans une mémoire STT-MRAM (Spin Transfer Torque Magnetoresistive Random Access Memory). Une pluralité de cellules de bit couplées chacune à l'une d'une pluralité de lignes de bit, de lignes de mot et de lignes de source sont prévues. Une pluralité de transistors de précharge correspondant à l'une de la pluralité de lignes de bit sont configurés pour décharger les lignes de bit à la masse avant une opération de lecture.

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