G - Physics – 06 – F
Patent
G - Physics
06
F
354/243
G06F 9/06 (2006.01) G06F 12/14 (2006.01) G06F 13/00 (2006.01)
Patent
CA 1153474
HARDWARE MEMORY WRITE LOCK CIRCUIT Abstract of the Disclosure A hardware circuit for protecting against the accidental writing in an area of memory which contains critical data. In order to access the critical data memory area during a write cycle, it is necessary first to control predetermined memory access cycles which include, for exam- ple, the writing of predetermined data at a predetermined address. After detection of such a "fictitious" write cycle, the hardware allows the next write cycle to access the critical data memory area.
366282
R. William Wray & Associates
Timeplex Inc.
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