G - Physics – 05 – B
Patent
G - Physics
05
B
342/21, 341/38,
G05B 15/02 (2006.01)
Patent
CA 1137194
ABSTRACT OF THE DISCLOSURE Sub-loop controllers arranged around a micro- processor are assigned to operation terminals to be controlled, and connected to a master controller and a host computer through a system bus to be supplied with a control command therefrom. Analog memories for manual control of the operation terminals are connected to the host computer through a special, common wiring. If one of the sub-loop controllers breaks down, the host computer directly controls the operation terminal by use of this analog memory thereby to back up the sub-loop controller.
354735
Sugano Akira
Tooyama Eiji
Hitachi Ltd.
Kirby Eades Gale Baker
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