High current high voltage vertical pmos in ultra high...

H - Electricity – 01 – L

Patent

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Details

H01L 29/788 (2006.01) H01L 29/06 (2006.01) H01L 29/78 (2006.01)

Patent

CA 2134504

A vertical transistor which is built in a substrate of a given first carrier type utilizing standard processes but which has a unique layout which facilitates high voltage, high current operation while still conserving space. The transistor is built utilizing a repeatable combination gate/source area that is built in the upper area of the substrate such that the remaining lower portion of the substrate underneath the combination gate/source area is the drain area of the transistor.

L'invention est un transistor vertical construit dans un substrat d'un premier type de porteurs donné au moyen de procédés standard, mais ayant une configuration particulière qui facilite le fonctionnement sous haute tension à des courants intenses tout en minimisant l'encombrement. Ce transistor utilise une combinaison grille-source construite dans la partie supérieure du substrat de telle façon que la partie inférieure du substrat qui se trouve sous la combinaison grille-source constitue le drain du transistor.

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