High-density memory array packaging

Details High-density memory array packaging High-density memory array packaging

H - Electricity

01

L

356/9, 339/7.2

H01L 25/065 (2006.01) H01L 23/538 (2006.01) H01L 25/10 (2006.01) H01L 25/16 (2006.01) H05K 1/14 (2006.01) H05K 3/34 (2006.01)

Patent

CA 2031865

Abstract A low-profile, high-density package for integrated circuit chips is provided. A first multichip memory module includes first and second interconnect members having low-profile memory chips mounted on a first side of each member. Low-profile edge clips are employed to mechanically connect a second side of the second member to a second side of the first member, and to electrically connect the first sides of the members to a first surface of a circuit board. Likewise, a second multichip memory module includes first and second interconnect members having low-profile memory chips mounted to a first side of each member. Low-profile edge clips are employed to mechanically connect the second sides of the members, and to electrically connect the first sides of the members to a second surface of the circuit board. A thermal management technique that distributes thermal loads is thereafter applied to create a high-density package capable of insertion into a standard computer backplane and cabinet.

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