High-performance dram arrays including trench capacitors

Details High-performance dram arrays including trench capacitors High-performance dram arrays including trench capacitors

H - Electricity

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356/199, 352/82

H01L 27/10 (2006.01) H01L 21/82 (2006.01) H01L 21/8242 (2006.01) H01L 27/108 (2006.01) H01L 29/94 (2006.01)

Patent

CA 1258125

HIGH-PERFORMANCE DRAM ARRAYS INCLUDING TRENCH CAPACITORS Abstract Parallel elongated trenches in a silicon substrate are utilized to form multiple distinct memory cell capacitors on each continuous wall of each trench. Chanstops are formed between adjacent capacitors to achieve electrical isolation. A separate word line overlies each trench wall and is connected via respective MOS transistors to the spaced-apart capacitors formed on the wall. A reliable high-density memory characterized by excellent performance is thereby realized.

514070

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