H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/25
H01L 21/38 (2006.01) H01L 21/225 (2006.01) H01L 21/8242 (2006.01) H01L 29/94 (2006.01)
Patent
CA 1244143
- 1 - Abstract: The present invention relates to a method of making a VLSI DRAM device in a semiconductive member. The method comprises the steps of forming trenches in a portion of the member that exhibits a specified conductivity type. The trenches each include walls that extend into the member from a main planar surface thereof, whereby edges are defined where the trench walls meet the main planar surface. The method further includes the step of masking the entire main planar surface of the member except for limited surface portions that extend a prescribed distance away from the edges, simultaneously introducing dopants of the opposite conductivity type into shallow regions below the surface portions and below the trench walls to form in and adjacent to each trench in the semiconductor member a continuous conductive layer that comprises a conductive trench layer and a conductive laterally extending surface extension thereof. Finally, the method includes the step of forming an associated MOS transistor, including source and drain regions, in the same semiconductive member adjacent each trench to establish one region of each such adjacent transistor in electrical contact with a portion of the laterally extending extension of the adjacent trench layer.
495671
Lebowitz Joseph
Lynch William T.
American Telephone And Telegraph Company
Kirby Eades Gale Baker
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