High rate, long block length, low density parity check encoder

Details High rate, long block length, low density parity check encoder High rate, long block length, low density parity check encoder

H - Electricity

03

M

H03M 13/13 (2006.01)

Patent

CA 2638318

There is provided a parity check encoder (100) comprising a data memory (PPDM) configured for storing input data, a calculation/parity result storage means (CPRSM), and a selector/serializer means (SSM). The CPRSM (104, 106) is coupled to the PPDM (102) and is configured to calculate parity bits in parallel using input data and information contained in a parity check matrix H. The SSM (108) is coupled to the PPDM and CPRSM. The SSM is configured to generate an encoded output sequence using the input data and parity bits. The matrix H is formed of a plurality of sub-matrices. Each sub-matrix of the sub-matrices is an all zero (0) matrix, an identity matrix, or a circular right shifted version of the identity matrix. A portion B of the matrix H includes a plurality of rows having two (2) ones (1), except for a first row which includes a single one (1).

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