High-rate random bitstream generation

H - Electricity – 03 – K

Patent

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H03K 3/84 (2006.01)

Patent

CA 2554393

A method and a circuit for accelerating a pseudo-random input bitstream (PRBS(T¿1?)) generated at a first low clock frequency into an identical output bitstream (PRBS(T¿0?)) at a second high clock frequency by sampling the output bitstream, delaying the sampled stream by a predetermined value (t) and combining the delayed stream with the input bitstream.

L'invention concerne un procédé et un circuit d'accélération d'un flux de bits d'entrée pseudo aléatoire (PRBS(T¿1?)), généré à une première fréquence d'horloge rela­tivement basse, en un flux de bits de sortie identique (PRBS(T¿0?)) à une deuxième fréquence d'horloge élevée, consistant à prélever le flux de bits de sortie, à retarder le flux prélevé d'une valeur (.TAU.) prédéterminée, et à combiner le flux retardé avec le flux de bits d'entrée.

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