High resolution sample clock generator with deglitcher

H - Electricity – 03 – K

Patent

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328/87

H03K 5/135 (2006.01) H03L 7/099 (2006.01) H04L 7/033 (2006.01)

Patent

CA 2019347

Abstract A digital controlled clock provides ultra fine resolution for a sampling clock signal for recovering data from a received signal, the phase jump of the sampling clock signal being determined the number of stages in a multiphase clock generator that generates a number of equally-spaced phase clock outputs based on a reference clock signal. Phase selection is performed through a very low overhead phase commutator in response to phase advance/retard inputs. A clock deglitcher matched to the stages of the ring oscillator eliminates spikes generated when the phase commutator switches.

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