G - Physics – 06 – F
Patent
G - Physics
06
F
354/238, 354/230
G06F 5/00 (2006.01) G06F 5/01 (2006.01) G06F 11/10 (2006.01)
Patent
CA 1165897
ABSTRACT OF THE DISCLOSURE In a high speed data processing system, there is provided a circuit for shifting either right or left as data is transmitted to or from the main storage unit. Apparatus for high speed parallel byte shifting is connected to the data bus which connects the main storage unit to the system and comprises logic which selects predetermined byte lines. Information from the individually selected byte lines is temporarily stored in parallel buffer registers and subsequently returned to a different byte line to provide byte shifting without the re- quirement of shift registers of complex logic. When pre- determined byte lines to the byte shifters are selected, control means are provided to activate a set of shift select means connected to error checking circuits. The error checking circuits comprise logic gating means for checking the proper selection of byte lines and for storing a signal indicative of an error or absence of an input error in the error storage means. When the data byte is being transferred out or read out of the byte shifter, the error storage means is read out to determine the presence or absence of an output error from the error storage means.
392987
Fetherstonhaugh & Co.
Sperry Corporation
LandOfFree
High speed byte shifter and error checking circuits does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with High speed byte shifter and error checking circuits, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High speed byte shifter and error checking circuits will most certainly appreciate the feedback.
Profile ID: LFCA-PAI-O-921452