G - Physics – 06 – F
Patent
G - Physics
06
F
354/230.71
G06F 9/22 (2006.01) G06F 9/24 (2006.01) G06F 9/26 (2006.01) G06F 9/32 (2006.01) G06F 9/38 (2006.01) G11C 11/406 (2006.01)
Patent
CA 1140678
ABSTRACT Therein is disclosed high speed, compact computer system architecture. System architecture includes a processor for processing machine language data, a memory for storing at least machine language instructions for use by processor, microinstruc- tion logic for storing and providing sequences of frequently used instructions, and busses for transmitting at least instruc- tions between processor and memory. Microinstruction memory circuitry is disclosed for efficient storage of micro- instructions in available micro- instruction memory space. Also disclosed is microinstruction selection circuitry for high speed selection of successive microinstructions of a sequence. Memory control circuitry is disclosed for providing memory refresh during battery back-up operation. Instruction pre-fetch circuitry is disclosed for fetching from memory a next instruction to be executed while a current instruction is being executed.
340691
Data General Corporation
Macrae & Co.
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