High-speed digital image processing apparatus

Details High-speed digital image processing apparatus High-speed digital image processing apparatus

H - Electricity

04

N

350/32

H04N 7/18 (2006.01) G06T 5/00 (2006.01) G09G 5/399 (2006.01) H04N 5/44 (2006.01)

Patent

CA 1331217

ABSTRACT OF THE DISCLOSURE An image processing apparatus is provided which is capable of real time image processing, especially filtering, without generating a delay in the frame memory. A cascade filtering circuit filters digital video signals obtained by digitally converting analog video signals to obtain a time sequential digital pixel data stream for the filtering operation based on a pattern of predetermined constants of p-rows and q-columns. The cascade filtering circuit using p basic filter circuits cascade-connected with each other. Each basic filter circuit carries out the filtering for one-row and q columns of pixel data. Each basic filter circuit includes delay circuits, multipliers and adders. Interlace type digital video signals are converted into a noninterlace type pixel data stream by a structure in which two frame memories are alternately switched in accordance with a frame period and the pixel data are written in every other line in one frame memory while the pixel data are read-out in a noninterlace manner from the other frame memory, and vice versa.

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