High speed method and apparatus for data transfer

G - Physics – 06 – F

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354/238

G06F 12/02 (2006.01) G06F 3/14 (2006.01) G09G 5/39 (2006.01)

Patent

CA 1317686

ABSTRACT A graphic display PC/interface system is described which includes three memory units: a source memory which is addressed in planar byte increments and stores display data units on a bit per plane basis; a target memory for storing display data units in a manner suitable for operation of a display unit; and a window buffer for transferring display data units from the source memory to the target memory. The system transfers a quantity of display data unit bytes from the source memory to the target memory by accessing pairs of planar bytes, which pair of planar bytes may have a display data unit byte bridging therebetween. The method comprises selecting a first pair of planar bytes from the source memory; aligning the display data unit byte which lies totally within the selected first pair of planar butes; selecting a second pair of planar bytes from the source memory; aligning the display data unit byte which lies totally within the second selected pair of planar bytes; consolidating the the display data unit byte which bridges between the first and second pairs of selected planar bytes; aligning the consolidated display data unit byte; and transferring aligned display data unit bytes to the window buffer means. SA-988003

602127

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