High speed phase locked loop

H - Electricity – 03 – L

Patent

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331/40, 328/0.3

H03L 7/00 (2006.01) H03L 7/113 (2006.01)

Patent

CA 1216903

ABSTRACT OF THE DISCLOSURE A phase locked loop circuit for high frequency digital electronic signals is provided which includes a loop filter having a substantially infinite bandwidth and wherein the sum of the frequency comparator and phase comparator output signals is actively integrated by an operational amplifier and summed with a flat, passively attenuated signal from the phase comparator. The PLL circuit includes a phase comparator having a full adder employing current mode logic so as to reduce parasitic capaci- tances and stray voltages, a frequency comparator having an additional, final flip-flop means out of the final combinatorial logic so as to retain the polarity of the final waveform transi- tion, and an inhibiting circuit to disable the output of the final flip-flip of the frequency comparator when phase lock is attained by adding a complementary signal thereto. -1-

448135

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