High-speed small digital multiplier

Details High-speed small digital multiplier High-speed small digital multiplier

G - Physics

06

F

G06F 7/52 (2006.01)

Patent

CA 2124737

A digital multiplier absolutizes a multiplicand value and a multiplier value for decreasing component bits thereof, and multiplies the absolutized multiplicand value by the absolutized multiplier value for producing a product without a sign bit. The sign bits are produced from the multiplicand value and the multiplier value independent from the multiplication, and the sign bits are added to the data code indicative of the product. As a result, the component circuits for producing partial products are decreased, and the multiplication speed is increased.

L'invention est un multiplicateur numérique qui détermine la valeur absolue d'un multiplicande et d'un multiplicateur pour réduire leurs nombres de bits, et qui multiplie ces valeurs absolues pour donner un produit sans bit de signe. Les bits de signe sont produits à partir du multiplicande et du multiplicateur indépendamment de la multiplication et sont ajoutés au code de données représentant le produit. Il en résulte une réduction du nombre de circuits nécessaires pour obtenir les produits partiels, ce qui accroît la vitesse de la multiplication.

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