High speed switching architecture

H - Electricity – 04 – L

Patent

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Details

H04L 12/56 (2006.01)

Patent

CA 2112664

2112664 9301669 PCTABS00019 A high speed non-blocking buffered banyan packet switching architecture which utilizes parallel switching fabrics (16, 17, 18, 19) to switch slices of serial packets in parallel. A highly parallel interconnect network within each fabric allows for high speed effective data switching at relatively low clock speeds.

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