High voltage generating circuit for volatile semiconductor...

H - Electricity – 02 – M

Patent

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H02M 3/20 (2006.01) G11C 5/14 (2006.01) G11C 11/407 (2006.01) H02M 3/07 (2006.01)

Patent

CA 2243375

A high voltage generating circuit which provides a constant V PP output without any threshold voltage drop and which does not suffer from latch-up problems is described. Thus a voltage boosting circuit which provides for a boosted voltage V PP at an output node, from a supply voltage V DD, includes a precharge transistor element responsive to a precharge clock signal for transferring the supply voltage V DD to a boost node for precharging the boost node to the full supply voltage V DD. The circuit further includes a capacitive element connected between the boost node and a pump node, the capacitive element pumping the boost node in response to a pump voltage signal applied to the pump node; and a switching element connected between the boost node and the output node, for transferring charge from the capacitive element to the output node to provide the boosted voltage V PP. In particular the precharge transistor element is an PMOS transistor. Furthermore in order to prevent latch-up of the PMOS devices, a switching circuit is provided to maintain the substrate at the highest voltage in the circuit.

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