H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/17
H01L 23/12 (2006.01) H01L 23/24 (2006.01) H01L 23/31 (2006.01) H01L 23/498 (2006.01) H01L 23/58 (2006.01)
Patent
CA 1304170
- 17 - 88/073 ABSTRACT OF THE DISCLOSURE In a highly integrated circuit the semiconductor chip (8) is fastened on a substrate (17) which projects on all sides only a few millimeters beyond the semi- conductor chip (8). For full dynamic testing of the circuit before insertion, connections are provided which axe arranged outside the projecting substrate edge (23) with a sufficiently large grid spacing. In a first embodiment (Fig. 2D) "lost" test connections (5) are used which are separated after testing. In a second embodiment (Fig. 3E), contact areas in the form of bumps (21) are used for testing which are arranged on the underside of through-holes (18) lying in the chip mounting area. In this manner it is possible to realize a circuit with greatly reduced space requirement, which at the same time can be fully tested dynamically before insertion. (Figs. 2D,3E)
606347
Ackermann Karl-Peter
Berner Gianni
Ackermann Karl-Peter
Berner Gianni
Contraves Ag
Oerlikon-Contraves Ag
Swabey Ogilvy Renault
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