Holdover (rubber-band) memory for sequential line write out...

G - Physics – 06 – F

Patent

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354/137, 354/235

G06F 7/38 (2006.01) A61B 5/0436 (2006.01) G01D 9/00 (2006.01) G01R 13/34 (2006.01) G06F 5/08 (2006.01) G06F 7/60 (2006.01) G06F 15/00 (2006.01) G06G 7/00 (2006.01)

Patent

CA 1087738

ABSTRACT A system for the cyclical time-compression of a signal waveform, particularly applicable to the display of physiological waveform data from patients. The system receives a continuous data sequence, as from an initial waveform, and continuously and temporarily stores waveform data during the trace and retrace phases (phases B & A) of a processing or display operation or cycle and which subsequently reads out substantially all of the stored data in a time-compressed form during the trace phase (phase B) of the cycle. The average rate at which data is read out of storage is faster than the average rate at which it is entered into storage, the ratio of the average readout rate to the average entry rate being the compression ration of the system and corresponding herein with the ratio of a full display sweep cycle to the trace portion of that cycle. The resulting data which is read out from the time-compression system may be applied to the input of display means and comprises the initial signal waveform now in time-compressed form, such that the initial waveform is displayed in its entirety. In a preferred embodiment, periodic samples of the initial, or source, waveform are sequentially entered in a fixed access, recirculating memory (shift register) at a rate which results in apparent precession of the samples in the memory. When the memory is "full", the Abstract...continued. samples are read out of memory at a syncopated rate which, on average, is faster than the rate at which samples had entered and are continuing to enter, thereby decreasing the storage delay between entry and readout. The time- compression ration is essentially Image , where n is an integer representative of the length of the trace phase of a trace-retrace display cycle. Means are provided for reclocking and equalizing the timing of the data samples being read out of memory at a syncopated rate to avoid distortion in the output waveform.

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