Image cancelling mixer circuit on an integrated circuit chip

H - Electricity – 04 – B

Patent

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Details

H04B 1/16 (2006.01) H03D 7/16 (2006.01) H04B 1/12 (2006.01) H03D 7/18 (2006.01)

Patent

CA 2065283

An IF mixer circuit (10) in a receiver implemented in integrated circuits employs a pair of doubly balance mixers (22, 46), one injected with a local oscillator reference signal in phase while the quadrature phase of the reference signal is injected into the second mixer. A phase shift circuit (42) adds another 90° phase shift to the output of the second mixer (46), and the in-phase and out-of-phase signals are applied to a summing circuit (40) to attenuate unwanted mixer products and reinforce the desired IF sig- nal. The balanced elements of the 90° phase shift circuit (42) employ a transistor (61) with equal emitter and collector resistances, a diode-connected transistor (63) in series with the collector load resistance (65), and a collector-to-base capacitor (67), which pro- vide a constant-amplitude phase shift in a unity gain structure independent of current, to produce a precise 90° phase shift. Emit- ter current is adjustable to compensate for production variation in the absolute value of the fixed resistance, i.e., by varying the current in the transistor and diode, the dynamic resistance offsets the fixed resistance variation.

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